2016•IEEE Transactions on Electromagnetic CompatibilityRequires access

Development of Simple Physics-Based Circuit Macromodel From PEEC

Natalia G. Bondarenko, Tamar Makharashvili, Junping He, Phil Berger, James L. Drewniak, Albert E. Ruehli, Daryl G. Beetner

Open publisher page 18 citations

Abstract

The evaluation of electromagnetic parasitics is important for electromagnetic interference within power electronics systems. Simple yet accurate physics-based lumped-circuit models of these parasitics can facilitate fast analysis and better understanding of the system performance. Methods exist to reduce complex electromagnetic models to much simpler representations but, while they speed up calculation, they do not preserve physicality. In this paper, a methodology is developed for obtaining a simplified SPICE circuit from a large-scale partial element equivalent circuit (PEEC) model, where there is a clear correlation between geometry and parasitic circuit elements. To preserve correlation between equivalent circuits and physical geometry, reduction is done first for inductance and resistance; then, reduction is performed for capacitance using nodes from the reduced LR model. The reduced model gives a better insight into the causes of and possible solutions to electromagnetic problems and can be used to improve the design. The method was validated on real power electronics geometries using frequency-dependent behavior of port impedances and admittances. The initial PEEC model for this example contained approximately 10 645 unknowns and was reduced to 195 elements. The calculated and measured impedances agree within 0.1 dB up to 200 MHz.

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What this paper is about

The evaluation of electromagnetic parasitics is important for electromagnetic interference within power electronics systems. Simple yet accurate physics-based lumped-circuit models of these parasitics can facilitate fast analysis and better understanding of the system performance. Methods exist to reduce complex electromagnetic models to much simpler representations but, while they speed up calculation, they do not preserve physicality. In this paper, a methodology is developed for obtaining a simplified SPICE circuit from a large-scale partial element equivalent circuit (PEEC) model, where there is a clear correlation between geometry and parasitic circuit elements. To preserve correlation between equivalent circuits and physical geometry, reduction is done first for inductance and resistance; then, reduction is performed for capacitance using nodes from the reduced LR model. The reduced model gives a better insight into the causes of and possible solutions to electromagnetic problems and can be used to improve the design. The method was validated on real power electronics geometries using frequency-dependent behavior of port impedances and admittances. The initial PEEC model for this example contained approximately 10 645 unknowns and was reduced to 195 elements. The calculated and measured impedances agree within 0.1 dB up to 200 MHz.

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Available abstract

The evaluation of electromagnetic parasitics is important for electromagnetic interference within power electronics systems. Simple yet accurate physics-based lumped-circuit models of these parasitics can facilitate fast analysis and better understanding of the system performance. Methods exist to reduce complex electromagnetic models to much simpler representations but, while they speed up calculation, they do not preserve physicality. In this paper, a methodology is developed for obtaining a simplified SPICE circuit from a large-scale partial element equivalent circuit (PEEC) model, where there is a clear correlation between geometry and parasitic circuit elements. To preserve correlation between equivalent circuits and physical geometry, reduction is done first for inductance and resistance; then, reduction is performed for capacitance using nodes from the reduced LR model. The reduced model gives a better insight into the causes of and possible solutions to electromagnetic problems and can be used to improve the design. The method was validated on real power electronics geometries using frequency-dependent behavior of port impedances and admittances. The initial PEEC model for this example contained approximately 10 645 unknowns and was reduced to 195 elements. The calculated and measured impedances agree within 0.1 dB up to 200 MHz.

Key concepts: Partial element equivalent circuit, Parasitic extraction, Equivalent circuit, Electronic engineering, Electromagnetic interference, Inductance, Electromagnetic compatibility, Electrical impedance

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