Data Acquisition System Design of Mini Navigation Computer based FPGA

This paper presents a new navigation computer scheme which uses a high performance DSP as core and FPGA as mainly external IO interface, and emphasizes the design of ADC Sampling Controller using FPGA. The processing unit DSP accesses the FIFO in FPGA reading data only by EMIF. The entire FPGA design is described by VHDL, and the timing simulation is put up with Quartus2 4.0. The simulation result shows that this sampling controller design is effective. This paper also describes hardware and software designs of DSP to FPGA interface.