Design of Duplex Interface Between FPGA and USB2.0
Huang Lu
Abstract
Huang Lu
Abstract
In order to accomplish the high-speed data transportation between the FPGA and the USB2.0,The system implement a bi-directional interface which works in the Slave FIFO mode of USB2.0 interface chip CY7C68013 and using the time division multiplexing mechanism.After the self-loop testing by writing data continuously from OUT FIFO to IN FIFO of USB under the control of the FPGA,this design has been applied to the ultra-wideband(UWB)wireless systems.The results show that the interface works stably and transfers data accurately,its average rate is 12Mb/s.
A significance statement is not available in the OpenAlex record.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
In order to accomplish the high-speed data transportation between the FPGA and the USB2.0,The system implement a bi-directional interface which works in the Slave FIFO mode of USB2.0 interface chip CY7C68013 and using the time division multiplexing mechanism.After the self-loop testing by writing data continuously from OUT FIFO to IN FIFO of USB under the control of the FPGA,this design has been applied to the ultra-wideband(UWB)wireless systems.The results show that the interface works stably and transfers data accurately,its average rate is 12Mb/s.
Key concepts: FIFO (computing and electronics), USB, Field-programmable gate array, Interface (matter), Computer hardware, Computer science, Embedded system, Multiplexing