2012•Journal of Liaoning UniversityRequires access

Design of Highspeed Image Processing and SOPC System Based on NIOS

Yongbo Wang

Abstract

This paper presents a configuration in the SOPC system about programmable image processing algorithm design based on FPGA.Users can design their own SOPC system at any time via modify the configuration on a chip.The system is a parallel top-down design of hardware and software,and the results of image process can display in the VGA terminal When the system design well,users can configure the system with Different algorithms to achieve various image processing functions in the Nios IDE.

About this research paper

What this paper is about

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Key concepts: Video Graphics Array, Nios II, Embedded system, Field-programmable gate array, Image processing, Computer science, Process (computing), Computer hardware