Design of the Digital Image Replay System Aased on NiosII
Yuan Hai-lin
Abstract
Yuan Hai-lin
Abstract
This paper researches a design method of embedded Digital Image Replay System based on SOPC technology.The system realizes high-speed D/A conversion and replay of image signal,by configuring NiosⅡ soft core CPU and some corresponding interface modules on a PFGA to construct the hardware of the system,and with the support of a video D/A converters IC ADV7123,and by combining software programming.As SOPC and DMA technology are used,the system has such advantages as design flexibility,quick data processing speed and good expansibility.
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This paper researches a design method of embedded Digital Image Replay System based on SOPC technology.The system realizes high-speed D/A conversion and replay of image signal,by configuring NiosⅡ soft core CPU and some corresponding interface modules on a PFGA to construct the hardware of the system,and with the support of a video D/A converters IC ADV7123,and by combining software programming.As SOPC and DMA technology are used,the system has such advantages as design flexibility,quick data processing speed and good expansibility.
Key concepts: Computer science, Embedded system, Nios II, Computer hardware, Software, Interface (matter), Field-programmable gate array, Construct (python library)