Design of the De-interlacing System Integrated in a Video Format Conversion Chip

To deal with difficulties in designing the video format conversion chip, the author brings forward a robust and well-extensible self-adaptive control strategy, and expatiates on the implementation scheme of its de-interlacing system based on the control strategy mentioned above. Due to the de-interlacing algorithm characteristics, a motion-value stored data transfer precept and a pipeline-based ALU are proposed to alleviate computational burden and improve performance. Thus, the system can fulfill real-time processing under relatively low power consumption.