Optimization of H.264 Decoder Based on TMS320DM642
Mei‐Fang Chen
Abstract
Mei‐Fang Chen
Abstract
The architecture and complexity of H.264 software decoder are analyzed, the emphasis and difficulties of optimization are figured out, then combining with the characteristics of TMS320DM642, this paper discusses the implementation and optimization of H.264 decoder on TMS320DM642.The optimization is involved mostly with the enhancement of the code parallelism and the access efficiency of memory.This paper emphasizes on the optimization of the IDCT module and moving compensation module.The experiments result shows that the H.264 decoder in this paper can implement the realtime decoding of the CIF video stream.
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The architecture and complexity of H.264 software decoder are analyzed, the emphasis and difficulties of optimization are figured out, then combining with the characteristics of TMS320DM642, this paper discusses the implementation and optimization of H.264 decoder on TMS320DM642.The optimization is involved mostly with the enhancement of the code parallelism and the access efficiency of memory.This paper emphasizes on the optimization of the IDCT module and moving compensation module.The experiments result shows that the H.264 decoder in this paper can implement the realtime decoding of the CIF video stream.
Key concepts: Computer science, Video decoder, Decoding methods, Program optimization, Compensation (psychology), Soft-decision decoder, Code (set theory), Parallel computing