High Speed Data Sample Circuit Based on CPLD Technology and Application in Flowmeter
Wang Jian-guo
Abstract
Wang Jian-guo
Abstract
The measurement principle and hardware structure of a new-style time difference method of the ultrasonic flowmeter of software arithmetic based on CPLD high-speed data sampling technology are simply presented.It is adopted high speed and complex programmable logic device CPLD in the data sample circuit.High-speed dual-port RAM,control sample time sequence logic,CPU interface and bus circuit are designed in CPLD,sample speed is up to 80 MHz and sample depth is 1 kB,it can fulfill the request of ultrasonic flowmeter software arithmetic to sampling.The design can upgrade in-line.Thus,system's whole performance is improved.
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The measurement principle and hardware structure of a new-style time difference method of the ultrasonic flowmeter of software arithmetic based on CPLD high-speed data sampling technology are simply presented.It is adopted high speed and complex programmable logic device CPLD in the data sample circuit.High-speed dual-port RAM,control sample time sequence logic,CPU interface and bus circuit are designed in CPLD,sample speed is up to 80 MHz and sample depth is 1 kB,it can fulfill the request of ultrasonic flowmeter software arithmetic to sampling.The design can upgrade in-line.Thus,system's whole performance is improved.
Key concepts: Complex programmable logic device, Computer hardware, Sample (material), Software, Sampling (signal processing), Programmable logic device, Sample and hold, Upgrade