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High-Speed Operational Amplifier Based on 0.5 μm CMOS Process

Lenian He

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Abstract

A design methodology of high-speed operational amplifier(Op-amp) with high frequency of unity-gain bandwidth,high slew rate and large output swing is proposed.The structure with two-stage fully differential CMOS circuit was used in the op-amp,and the non-dominant pole was canceled by using a zero in left plane which is produced by adding a feed-forward amplify circuit.Moreover,obtain high stability of the common-mode,a novel CMFB structure is used.As a result,the value of CMRR was increased to be 62 dB.The chip is implemented by using CSMC 0.5 μm CMOS mixed-signal technology.The measurement results indicate that under the condition of supplied voltage of 3.3 V,the op-amp gets a DC voltage gain of 65.5 dB,unity-gain bandwidth of 350 MHz and output swing of ±2.7 V.

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What this paper is about

A design methodology of high-speed operational amplifier(Op-amp) with high frequency of unity-gain bandwidth,high slew rate and large output swing is proposed.The structure with two-stage fully differential CMOS circuit was used in the op-amp,and the non-dominant pole was canceled by using a zero in left plane which is produced by adding a feed-forward amplify circuit.Moreover,obtain high stability of the common-mode,a novel CMFB structure is used.As a result,the value of CMRR was increased to be 62 dB.The chip is implemented by using CSMC 0.5 μm CMOS mixed-signal technology.The measurement results indicate that under the condition of supplied voltage of 3.3 V,the op-amp gets a DC voltage gain of 65.5 dB,unity-gain bandwidth of 350 MHz and output swing of ±2.7 V.

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Available abstract

A design methodology of high-speed operational amplifier(Op-amp) with high frequency of unity-gain bandwidth,high slew rate and large output swing is proposed.The structure with two-stage fully differential CMOS circuit was used in the op-amp,and the non-dominant pole was canceled by using a zero in left plane which is produced by adding a feed-forward amplify circuit.Moreover,obtain high stability of the common-mode,a novel CMFB structure is used.As a result,the value of CMRR was increased to be 62 dB.The chip is implemented by using CSMC 0.5 μm CMOS mixed-signal technology.The measurement results indicate that under the condition of supplied voltage of 3.3 V,the op-amp gets a DC voltage gain of 65.5 dB,unity-gain bandwidth of 350 MHz and output swing of ±2.7 V.

Key concepts: CMOS, Slew rate, Swing, Fully differential amplifier, Operational amplifier, Open-loop gain, Electrical engineering, Bandwidth (computing)

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