A 4.2 GHz 1.8 V CMOS LC VCO
Tianchun Ye
Abstract
Tianchun Ye
Abstract
According to the Hajimiri VCO phase noise model, the effects of LC VCO circuit parameters on phase noise are analyzed. Several emphases about LC VCO design, including high Q on-chip inductor design, MOS-varactor design and tail current choice, are presented. A 4.2 GHz 1.8 V LC VCO is fabricated with SMIC 0.18 μm Mixed Signal 1P6 M CMOS process. The measured results show that phase noise is —101 dBc/Hz at a 1 MHz offset from the carrier frequency 4.239 GHz, and the VCO tuning range is 240 MHz.
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According to the Hajimiri VCO phase noise model, the effects of LC VCO circuit parameters on phase noise are analyzed. Several emphases about LC VCO design, including high Q on-chip inductor design, MOS-varactor design and tail current choice, are presented. A 4.2 GHz 1.8 V LC VCO is fabricated with SMIC 0.18 μm Mixed Signal 1P6 M CMOS process. The measured results show that phase noise is —101 dBc/Hz at a 1 MHz offset from the carrier frequency 4.239 GHz, and the VCO tuning range is 240 MHz.
Key concepts: Voltage-controlled oscillator, Phase noise, dBc, Varicap, CMOS, Offset (computer science), Inductor, Materials science