ScholarLens Back to search
2010•Microelectronics & ComputerRequires access

The Design of High Performance Viterbi Decoder Based on FPGA

Yan Zhang

Open publisher page 0 citations

Abstract

Convolutional code and its Viterbi decoding algorithm had been widely applied to various fields of communication and signal processing. This paper presents the decoding scheme of (2,1,7) convolutional code. In order to take both speed and size into account, the decoder combines parallel structure with serial structure. The core part of the decoder, Add-Compare-Select Unit, has been improved greatly, and the whole decoder has the advantages of performance and resource expense than traditional Viterbi decoder.

About this research paper

What this paper is about

Convolutional code and its Viterbi decoding algorithm had been widely applied to various fields of communication and signal processing. This paper presents the decoding scheme of (2,1,7) convolutional code. In order to take both speed and size into account, the decoder combines parallel structure with serial structure. The core part of the decoder, Add-Compare-Select Unit, has been improved greatly, and the whole decoder has the advantages of performance and resource expense than traditional Viterbi decoder.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Convolutional code and its Viterbi decoding algorithm had been widely applied to various fields of communication and signal processing. This paper presents the decoding scheme of (2,1,7) convolutional code. In order to take both speed and size into account, the decoder combines parallel structure with serial structure. The core part of the decoder, Add-Compare-Select Unit, has been improved greatly, and the whole decoder has the advantages of performance and resource expense than traditional Viterbi decoder.

Key concepts: Viterbi decoder, Computer science, Soft-decision decoder, Convolutional code, Viterbi algorithm, Decoding methods, Field-programmable gate array, Soft output Viterbi algorithm

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
The Design of High Performance Viterbi Decoder Based on FPGA — Research Paper | ScholarLens