2009Microcomputer InformationRequires access

High-speed Asynchronous FIFO Design and Implementation

Zhang Yong-shen

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Abstract

This article mainly studied the scheme usage of the internal resources EBRSRAM of FPGA realizes asynchronous FIFO,Focused on method of the Signal signs——empty/full state,And realizes with the VHDL language,finally has carried on the simulation confirmation.

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What this paper is about

This article mainly studied the scheme usage of the internal resources EBRSRAM of FPGA realizes asynchronous FIFO,Focused on method of the Signal signs——empty/full state,And realizes with the VHDL language,finally has carried on the simulation confirmation.

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Available abstract

This article mainly studied the scheme usage of the internal resources EBRSRAM of FPGA realizes asynchronous FIFO,Focused on method of the Signal signs——empty/full state,And realizes with the VHDL language,finally has carried on the simulation confirmation.

Key concepts: Computer science, FIFO (computing and electronics), Asynchronous communication, VHDL, Field-programmable gate array, FIFO and LIFO accounting, Scheme (mathematics), State (computer science)

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