2014•Electronic Design EngineeringRequires access

Based on FPGA high-speed data acquisition system design

Wang Dan-q

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Abstract

Increasingly significant for the actual obvious MCU slower processing speed and more high-speed digital to analog converter's rate can not match. For this problem, the characteristics of FPGA as the control unit is analyzed and a data acquisition system controlled by FPGA is designed in this paper. Overall system design is proposed, the hardware interface circuit between FPGA and A/D is independent designed, and gives a detailed description on how to use FPGA data to carry out the data acquisition of data acquisition system and logic control of data cache. For the actual acquisition to DC signal and AC signal, The results shows that this approach can better meet the real time and synchronization requirements of data acquisition system, but also increase the application flexibility of the system.

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What this paper is about

Increasingly significant for the actual obvious MCU slower processing speed and more high-speed digital to analog converter's rate can not match. For this problem, the characteristics of FPGA as the control unit is analyzed and a data acquisition system controlled by FPGA is designed in this paper. Overall system design is proposed, the hardware interface circuit between FPGA and A/D is independent designed, and gives a detailed description on how to use FPGA data to carry out the data acquisition of data acquisition system and logic control of data cache. For the actual acquisition to DC signal and AC signal, The results shows that this approach can better meet the real time and synchronization requirements of data acquisition system, but also increase the application flexibility of the system.

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Available abstract

Increasingly significant for the actual obvious MCU slower processing speed and more high-speed digital to analog converter's rate can not match. For this problem, the characteristics of FPGA as the control unit is analyzed and a data acquisition system controlled by FPGA is designed in this paper. Overall system design is proposed, the hardware interface circuit between FPGA and A/D is independent designed, and gives a detailed description on how to use FPGA data to carry out the data acquisition of data acquisition system and logic control of data cache. For the actual acquisition to DC signal and AC signal, The results shows that this approach can better meet the real time and synchronization requirements of data acquisition system, but also increase the application flexibility of the system.

Key concepts: Data acquisition, Field-programmable gate array, Computer hardware, Computer science, Microcontroller, FPGA prototype, Interface (matter), Embedded system

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