Design of a High-speed Data Acquisition System Based on FPGA
Hen S
Abstract
Hen S
Abstract
The high-speed data acquisition system based on FPGA, which is the core logic control module of the system is introduced. According to the method of top-down, FPGA is divided into some functional modules. The designing method and controlling flow of each module are discussed in detail. The VHDL language is adopted in the FPGA module. Software design and system simulation are completed in the integration circumstance of Xilinx ISE. The system not only can acquire 24-route analog signals with 500kHz of maximal frequency, but also has the ability of self-check by acquiring 1-route inner channel signals.
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The high-speed data acquisition system based on FPGA, which is the core logic control module of the system is introduced. According to the method of top-down, FPGA is divided into some functional modules. The designing method and controlling flow of each module are discussed in detail. The VHDL language is adopted in the FPGA module. Software design and system simulation are completed in the integration circumstance of Xilinx ISE. The system not only can acquire 24-route analog signals with 500kHz of maximal frequency, but also has the ability of self-check by acquiring 1-route inner channel signals.
Key concepts: Field-programmable gate array, Computer science, VHDL, Computer hardware, Embedded system, Data acquisition, FPGA prototype, Hardware description language