2002•Journal of Jinan UniversityRequires access

Implementation of float number operation on CPLD/FPGA chip by VHDL

Zhou Wei-xuan

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Abstract

A method of float number addition and multiplication operations implemented on CPLD/FPGA chip is introduced. the addition and multiplication operation of 6-bits real sequence has been implemented on the hardware platform of FLEX10K by using VHDL and Maxplus II software tool. 

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What this paper is about

A method of float number addition and multiplication operations implemented on CPLD/FPGA chip is introduced. the addition and multiplication operation of 6-bits real sequence has been implemented on the hardware platform of FLEX10K by using VHDL and Maxplus II software tool. 

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Available abstract

A method of float number addition and multiplication operations implemented on CPLD/FPGA chip is introduced. the addition and multiplication operation of 6-bits real sequence has been implemented on the hardware platform of FLEX10K by using VHDL and Maxplus II software tool. 

Key concepts: VHDL, Complex programmable logic device, Field-programmable gate array, Computer science, Multiplication (music), Float (project management), Software, Embedded system

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