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Design and Implement of CAN Bus System for an On-board Computer

Xia Jinjun

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Abstract

The central processor is 16-bit ARM71DMI kernel-based RISC MCU which applies separated address and data bus,while CAN controller has multiplex address and data bus through the address locking signal ALE.The voltage level of ARM is 3.3 V while the CAN controller is 5 V.In order to carry out transparent link,a programmable technique that converts the time-sequence of the data and control signal between MCU and CAN controllers is performed through a piece of CPLD chip is proposed.Redundant methods of CAN bus and the CANaerospace protocol is discussed in the paper.

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What this paper is about

The central processor is 16-bit ARM71DMI kernel-based RISC MCU which applies separated address and data bus,while CAN controller has multiplex address and data bus through the address locking signal ALE.The voltage level of ARM is 3.3 V while the CAN controller is 5 V.In order to carry out transparent link,a programmable technique that converts the time-sequence of the data and control signal between MCU and CAN controllers is performed through a piece of CPLD chip is proposed.Redundant methods of CAN bus and the CANaerospace protocol is discussed in the paper.

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Available abstract

The central processor is 16-bit ARM71DMI kernel-based RISC MCU which applies separated address and data bus,while CAN controller has multiplex address and data bus through the address locking signal ALE.The voltage level of ARM is 3.3 V while the CAN controller is 5 V.In order to carry out transparent link,a programmable technique that converts the time-sequence of the data and control signal between MCU and CAN controllers is performed through a piece of CPLD chip is proposed.Redundant methods of CAN bus and the CANaerospace protocol is discussed in the paper.

Key concepts: Control bus, Back-side bus, System bus, Microcontroller, Complex programmable logic device, Computer hardware, Bus, Local bus

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