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Design and Implementation of an Interrupter Processing System in Matrix DSPs

Wan Jiang-hua

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Abstract

This paper introducs the mechanism of an interrupt controller. During the design process, designers not only need to ensure correct functions, but also need to minimize the interrupt delay cost .There are no differences between the hardware interrupt mechanism and the software interrupt mechanism. Besides, the interrupt controller supports interrupt nesting and the interrupt nesting mechanism is very simple and flexible. The control logic is simplified and the interrupt latency overhead is reduced from 5 clock cycles to 4 clock cycles for this interrupt handing mechanism.

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What this paper is about

This paper introducs the mechanism of an interrupt controller. During the design process, designers not only need to ensure correct functions, but also need to minimize the interrupt delay cost .There are no differences between the hardware interrupt mechanism and the software interrupt mechanism. Besides, the interrupt controller supports interrupt nesting and the interrupt nesting mechanism is very simple and flexible. The control logic is simplified and the interrupt latency overhead is reduced from 5 clock cycles to 4 clock cycles for this interrupt handing mechanism.

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Available abstract

This paper introducs the mechanism of an interrupt controller. During the design process, designers not only need to ensure correct functions, but also need to minimize the interrupt delay cost .There are no differences between the hardware interrupt mechanism and the software interrupt mechanism. Besides, the interrupt controller supports interrupt nesting and the interrupt nesting mechanism is very simple and flexible. The control logic is simplified and the interrupt latency overhead is reduced from 5 clock cycles to 4 clock cycles for this interrupt handing mechanism.

Key concepts: Interrupt, Interrupt handler, Computer science, Embedded system, Latency (audio), Computer hardware, Microcontroller, Telecommunications

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