2012Radar Science and TechnologyRequires access

Multichannel High-Speed Data Acquisition System Based on FPGA and USB 2.0

He Zishu

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Abstract

This paper designs and realizes a USB-based multichannel high-speed data acquisition system to meet the requirements of a radar experiment platform.The system uses FPGA as its control core and employs multiple high sampling rate ADCs to realize multichannel high-speed data acquisition.In order to make sure the data transfer is unblocked,each channel owns a high-capacity DDR2 for high-speed data caching,and DDC to reduce the speed of data writing in.It transfers data to computer with Slave FIFO mode of USB chip of EZ-USB FX2LP family,and has an application program for control,data acquisition and waveform display.The entire system is composed of hardware,logic circuit inside the FPGA,USB firmware,USB device driver and application program.In the test,this system acquires the signal whose centre frequency is 60 MHz and bandwidth is 10 MHz effectively with sample rate at 80 MHz.The test result testifies that this project is correct and valid.

About this research paper

What this paper is about

This paper designs and realizes a USB-based multichannel high-speed data acquisition system to meet the requirements of a radar experiment platform.The system uses FPGA as its control core and employs multiple high sampling rate ADCs to realize multichannel high-speed data acquisition.In order to make sure the data transfer is unblocked,each channel owns a high-capacity DDR2 for high-speed data caching,and DDC to reduce the speed of data writing in.It transfers data to computer with Slave FIFO mode of USB chip of EZ-USB FX2LP family,and has an application program for control,data acquisition and waveform display.The entire system is composed of hardware,logic circuit inside the FPGA,USB firmware,USB device driver and application program.In the test,this system acquires the signal whose centre frequency is 60 MHz and bandwidth is 10 MHz effectively with sample rate at 80 MHz.The test result testifies that this project is correct and valid.

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Available abstract

This paper designs and realizes a USB-based multichannel high-speed data acquisition system to meet the requirements of a radar experiment platform.The system uses FPGA as its control core and employs multiple high sampling rate ADCs to realize multichannel high-speed data acquisition.In order to make sure the data transfer is unblocked,each channel owns a high-capacity DDR2 for high-speed data caching,and DDC to reduce the speed of data writing in.It transfers data to computer with Slave FIFO mode of USB chip of EZ-USB FX2LP family,and has an application program for control,data acquisition and waveform display.The entire system is composed of hardware,logic circuit inside the FPGA,USB firmware,USB device driver and application program.In the test,this system acquires the signal whose centre frequency is 60 MHz and bandwidth is 10 MHz effectively with sample rate at 80 MHz.The test result testifies that this project is correct and valid.

Key concepts: USB, Firmware, Computer hardware, FIFO (computing and electronics), Data acquisition, Field-programmable gate array, Computer science, Embedded system

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