A Fully Differential CMOS Sample and Hold Circuit
Haiyan Chen
Abstract
Haiyan Chen
Abstract
Charge injection effect and clock feedthrough effect,which affect the precision of sample and hold circuits,are analyzed.And a total differential CMOS sample and hold circuit is designed,which effectively eliminates both charge injection and clock feedthrough errors,minimizing nonlinearity errors and ensuring a much higher precision.Based on TSMC's 0.35 μm CMOS process,the circuit is simulated using Cadence SpectreS.Test results show that an SNR of-81 dB and an integral nonlinearity of ±0.25 LSB have been achieved for the circuit,which was used in a high speed and high precision A/D converter and excellent performance was achieved.
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Charge injection effect and clock feedthrough effect,which affect the precision of sample and hold circuits,are analyzed.And a total differential CMOS sample and hold circuit is designed,which effectively eliminates both charge injection and clock feedthrough errors,minimizing nonlinearity errors and ensuring a much higher precision.Based on TSMC's 0.35 μm CMOS process,the circuit is simulated using Cadence SpectreS.Test results show that an SNR of-81 dB and an integral nonlinearity of ±0.25 LSB have been achieved for the circuit,which was used in a high speed and high precision A/D converter and excellent performance was achieved.
Key concepts: CMOS, Sample and hold, Feedthrough, Cadence, Integral nonlinearity, Differential nonlinearity, Electronic engineering, Electronic circuit