2011Modern Electronics TechniqueRequires access

Design of Signal Synchronous Digital Multiplexing for PCM30/32-channel System Based on FPGA

Ruiliang Zong

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Abstract

In modern digital communication systems,multiplexing technology is extensively employed,so as to increase transmission efficiency by augmenting channel capacity.On the basis of analysis of primary group signal frame structure of PCM30/32-channel system,a FPGA based synchronous digital multiplexing system is designed,which takes EDA composite simulation design software Quartus II 8.0 as the development platform and performs modeling with Verilog HDL.Through simulations and analyses on functionality and routing,the correctness of the logic relationship between inputs and outputs is verified.The designed system is robust and implements the design requirements of multiplexing and demultiplexing signals synchronously at the transmitting end and the receiving end respectively.

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What this paper is about

In modern digital communication systems,multiplexing technology is extensively employed,so as to increase transmission efficiency by augmenting channel capacity.On the basis of analysis of primary group signal frame structure of PCM30/32-channel system,a FPGA based synchronous digital multiplexing system is designed,which takes EDA composite simulation design software Quartus II 8.0 as the development platform and performs modeling with Verilog HDL.Through simulations and analyses on functionality and routing,the correctness of the logic relationship between inputs and outputs is verified.The designed system is robust and implements the design requirements of multiplexing and demultiplexing signals synchronously at the transmitting end and the receiving end respectively.

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Available abstract

In modern digital communication systems,multiplexing technology is extensively employed,so as to increase transmission efficiency by augmenting channel capacity.On the basis of analysis of primary group signal frame structure of PCM30/32-channel system,a FPGA based synchronous digital multiplexing system is designed,which takes EDA composite simulation design software Quartus II 8.0 as the development platform and performs modeling with Verilog HDL.Through simulations and analyses on functionality and routing,the correctness of the logic relationship between inputs and outputs is verified.The designed system is robust and implements the design requirements of multiplexing and demultiplexing signals synchronously at the transmitting end and the receiving end respectively.

Key concepts: Multiplexing, Field-programmable gate array, Verilog, Computer science, Correctness, Statistical time division multiplexing, Embedded system, Channel (broadcasting)

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