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Dynamically reconfigurable system of FPGA based on DSP

Qing Chang

Open publisher page 1 citations

Abstract

To improve FPGA resource utilization,this study introduced fundamental and classification about dynamically reconfigurable FPGA at first, then the Virtex-4 FPGA configuration theory and two kinds of reconfiguration method were discussed, the hardware design of configuring FPGA with Digital Signal Processor(DSP) was proposed to implement the reconfiguration system.DSP was used to configure and reconfigure this FPGA in a SelectMAP configuration mode. The system could be configured fast and reconfigured partially. Finally the program flow chart of the dynamically reconfigurable system was presented according to procedure and time sequence relation. The experiment results indicated that the system was stable and could reconfigure FPGA with 5 Mbyte/s.

About this research paper

What this paper is about

To improve FPGA resource utilization,this study introduced fundamental and classification about dynamically reconfigurable FPGA at first, then the Virtex-4 FPGA configuration theory and two kinds of reconfiguration method were discussed, the hardware design of configuring FPGA with Digital Signal Processor(DSP) was proposed to implement the reconfiguration system.DSP was used to configure and reconfigure this FPGA in a SelectMAP configuration mode. The system could be configured fast and reconfigured partially. Finally the program flow chart of the dynamically reconfigurable system was presented according to procedure and time sequence relation. The experiment results indicated that the system was stable and could reconfigure FPGA with 5 Mbyte/s.

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Available abstract

To improve FPGA resource utilization,this study introduced fundamental and classification about dynamically reconfigurable FPGA at first, then the Virtex-4 FPGA configuration theory and two kinds of reconfiguration method were discussed, the hardware design of configuring FPGA with Digital Signal Processor(DSP) was proposed to implement the reconfiguration system.DSP was used to configure and reconfigure this FPGA in a SelectMAP configuration mode. The system could be configured fast and reconfigured partially. Finally the program flow chart of the dynamically reconfigurable system was presented according to procedure and time sequence relation. The experiment results indicated that the system was stable and could reconfigure FPGA with 5 Mbyte/s.

Key concepts: Field-programmable gate array, Control reconfiguration, Digital signal processing, Embedded system, Virtex, Computer science, FPGA prototype, Computer hardware

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