Design for Layout of a IF Receiver Circuit
Wei Tongli
Abstract
Wei Tongli
Abstract
The layout design procedure for analog IC is expatiated through an example of the layout design of an IF receiver circuit with Cadence Layout Design Tool and B300 Process. The design steps including creation of cell library, placement, routing, DRC and LVS and the specific methods of each step are expounded. Especially, the key steps such as placement and routing are discussed in detail. And finally, the entire layout of the whole chip is presented.
A significance statement is not available in the OpenAlex record.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
The layout design procedure for analog IC is expatiated through an example of the layout design of an IF receiver circuit with Cadence Layout Design Tool and B300 Process. The design steps including creation of cell library, placement, routing, DRC and LVS and the specific methods of each step are expounded. Especially, the key steps such as placement and routing are discussed in detail. And finally, the entire layout of the whole chip is presented.
Key concepts: Page layout, IC layout editor, Design layout record, Routing (electronic design automation), Physical design, Integrated circuit layout, Standard cell, Cadence