Design of a System Functional Verification Platform for 32 bit Mixed-Signal SoC Based
Zhiguo Yu
Abstract
Zhiguo Yu
Abstract
According to the requirement of a SoC design,a 32-bit SoC verification platform named SoC-FV is presented.The platform accomplishes the whole flow of CPU functional verification,such as IP function verification,collaborative verification,mixed-signal verification,verification program developing,verification program debugging,verification vector generation,verification testbench,verification configuration environment,comparison and analysis of results,and FPGA verification.The platform has been applied to a SoC fabricated by 0.18 μm CMOS process,which operates at 80-MHz clock frequency and consumes 450 mW.The verification platform has improved the verification efficiency,and has some useful reference for other SoC design.
A significance statement is not available in the OpenAlex record.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
According to the requirement of a SoC design,a 32-bit SoC verification platform named SoC-FV is presented.The platform accomplishes the whole flow of CPU functional verification,such as IP function verification,collaborative verification,mixed-signal verification,verification program developing,verification program debugging,verification vector generation,verification testbench,verification configuration environment,comparison and analysis of results,and FPGA verification.The platform has been applied to a SoC fabricated by 0.18 μm CMOS process,which operates at 80-MHz clock frequency and consumes 450 mW.The verification platform has improved the verification efficiency,and has some useful reference for other SoC design.
Key concepts: Intelligent verification, Functional verification, High-level verification, Verification, Computer science, Runtime verification, Field-programmable gate array, Embedded system