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2014•Computer Knowledge and TechnologyRequires access

Design of Simulator for VLIW Processor

Huang Guang-hon

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Abstract

Analyzing VLIW architecture processor, this paper designs a instruction set simulator with cycle accurate. According function, the simulator is divided to several module which with standard interface. The simulator is flexible and is able to become other processor prototype fast by modification and replacing。Adopting efficient decoding arithmetic for binary instruction and JIT-CCS, the simulator obtains excellent performance. The result demonstrates that the simulator can work effectively for design VLIW processor.

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What this paper is about

Analyzing VLIW architecture processor, this paper designs a instruction set simulator with cycle accurate. According function, the simulator is divided to several module which with standard interface. The simulator is flexible and is able to become other processor prototype fast by modification and replacing。Adopting efficient decoding arithmetic for binary instruction and JIT-CCS, the simulator obtains excellent performance. The result demonstrates that the simulator can work effectively for design VLIW processor.

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Available abstract

Analyzing VLIW architecture processor, this paper designs a instruction set simulator with cycle accurate. According function, the simulator is divided to several module which with standard interface. The simulator is flexible and is able to become other processor prototype fast by modification and replacing。Adopting efficient decoding arithmetic for binary instruction and JIT-CCS, the simulator obtains excellent performance. The result demonstrates that the simulator can work effectively for design VLIW processor.

Key concepts: Very long instruction word, Computer science, Computer architecture simulator, Instruction set, Interface (matter), Set (abstract data type), Instructions per cycle, Microarchitecture

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