Design and simulation of digital down conversion based on FPGA

In the software radio receiver,the frequency of digital signal which comes from AD front-end is up to 72 MHz.Such a high frequency makes the DSP cannot directly complete digital signal processing tasks.So how to rational design DDC which based FPGA is very important,it can reduce the digital signal frequency,and make the digital signal processing tasks convenient.In many digital signals processing system,the frequency of the Digital signal is very high.The back-end digital signal processors can hardly meet the real-time requirements;the problems above can be resolved through rational design of DDC.