2013Unpublished venueRequires access

New topology with reduced number of switches in asymmetrical cascaded multilevel inverter

Shweta Gautam, S. Pattnaik, Shubhrata Gupta, Varsha Singh

Open publisher page 12 citations

Abstract

Use of multilevel inverters has been increased rapidly in the recent years, due to its tremendous popularity in reduced voltage stress across power switches and low total harmonic distortion in output waveform. Various topology of multilevel inverter has been proposed. In this paper a new nine level single phase multilevel inverter topology has been presented and comparison is made between proposed topology and conventional topology and then the generalize form is presented. Multi-carrier pulse width modulation technique has been adopted for switching purpose. The output voltage THD for 9-level inverter is 6.2% and for 27-level inverter is 2.68%, whereas the output current THD for 9-level inverter is 2.01% and for 27-level inverter is 0.92%. The simulation results are based on MATLAB/SIMULINK software.

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What this paper is about

Use of multilevel inverters has been increased rapidly in the recent years, due to its tremendous popularity in reduced voltage stress across power switches and low total harmonic distortion in output waveform. Various topology of multilevel inverter has been proposed. In this paper a new nine level single phase multilevel inverter topology has been presented and comparison is made between proposed topology and conventional topology and then the generalize form is presented. Multi-carrier pulse width modulation technique has been adopted for switching purpose. The output voltage THD for 9-level inverter is 6.2% and for 27-level inverter is 2.68%, whereas the output current THD for 9-level inverter is 2.01% and for 27-level inverter is 0.92%. The simulation results are based on MATLAB/SIMULINK software.

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OpenAlex reports 12 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

Use of multilevel inverters has been increased rapidly in the recent years, due to its tremendous popularity in reduced voltage stress across power switches and low total harmonic distortion in output waveform. Various topology of multilevel inverter has been proposed. In this paper a new nine level single phase multilevel inverter topology has been presented and comparison is made between proposed topology and conventional topology and then the generalize form is presented. Multi-carrier pulse width modulation technique has been adopted for switching purpose. The output voltage THD for 9-level inverter is 6.2% and for 27-level inverter is 2.68%, whereas the output current THD for 9-level inverter is 2.01% and for 27-level inverter is 0.92%. The simulation results are based on MATLAB/SIMULINK software.

Key concepts: Topology (electrical circuits), Computer science, Inverter, Mathematics, Engineering, Electrical engineering, Voltage, Combinatorics

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