안전한 MCU 클럭 보호를 위한 온칩 클럭 검사기 기반 자동화된 글리치 프리 백업 클럭 변환 기법
안중현, 박대진, 조정훈
Abstract
안중현, 박대진, 조정훈
Abstract
The embedded microcontroller is operated by the logic gates synchronized on the clock pulses. Severe electrical situations such as high voltage/frequency surge may cause malfunctioning of the clock source. The clockless status of the system, due to the broken clock, may hold the abnormal state in the dangerous output driving mode or the glitch-clock pulse will invert the data of flip-flops by abnormal clock generation. In this paper, we propose on-chip clock controller architecture for the automatic clock failure detection. For the this, we adopt the edge detector, noise canceller logic and glitch-free clock changer circuit. The implemented edge detector unit detects the abnormal low-frequency of the clock source and the delay chain circuit of the clock pulse by the noise canceller can cancel out the glitch clock. The externally invalid clock source by detecting the emergency status will be switched to back-up clock source by glitch-free clock changer circuit.
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The embedded microcontroller is operated by the logic gates synchronized on the clock pulses. Severe electrical situations such as high voltage/frequency surge may cause malfunctioning of the clock source. The clockless status of the system, due to the broken clock, may hold the abnormal state in the dangerous output driving mode or the glitch-clock pulse will invert the data of flip-flops by abnormal clock generation. In this paper, we propose on-chip clock controller architecture for the automatic clock failure detection. For the this, we adopt the edge detector, noise canceller logic and glitch-free clock changer circuit. The implemented edge detector unit detects the abnormal low-frequency of the clock source and the delay chain circuit of the clock pulse by the noise canceller can cancel out the glitch clock. The externally invalid clock source by detecting the emergency status will be switched to back-up clock source by glitch-free clock changer circuit.
Key concepts: Clock domain crossing, Digital clock manager, Clock gating, CPU multiplier, Glitch, Synchronous circuit, Signal edge, Clock skew