Reduction of Common Mode Voltage in Asymmetrical Dual Inverter Configuration Using Discontinuous Modulating Signal Based PWM Technique

Conventional space vector pulse width modulation based asymmetrical dual inverter configuration produces high common mode voltage (CMV) variations. This CMV causes the flow of common mode current, which adversely affects the motor bearings and electromagnetic interference of nearby electronic systems. In this study, a simple and generalized carrier based pulse width modulation (PWM) technique is proposed for dual inverter configuration. This simple approach generates various continuous and discontinuous modulating signals based PWM algorithms. With the application of the discontinuous modulating signal based PWM algorithm to the asymmetrical dual inverter configuration, the CMV can be reduced with a slightly improved quality of output voltage. The performance of the continuous and discontinuous modulating signals based PWM algorithms is explored through both theoretical and experimental studies. Results show that the discontinuous modulating signal based PWM algorithm efficiently reduces the CMV and switching losses.