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2015•Unpublished venueRequires access

FPGA design and implementation of radix-2 Fast Fourier Transform algorithm with 16 and 32 points

S. Josue Saenz, Juan José Raygoza P., Edwin C. Becerra A., Susana Ortega Cisneros, Jorge Rivera

Open publisher page 18 citations

Abstract

The Fast Fourier Transform (FFT) is an important algorithm used in the field of Digital Signal Processing and Communication Systems. The FFT has applications in a wide variety of areas, such as linear filtering, correlation, and spectrum analysis, among many others. This paper describes the development of decimation-in-time radix-2 FFT algorithm with 16 and 32 points. VHDL was used as a description language, and ISE Design Suite as an Integrated Development Environment (IDE).

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What this paper is about

The Fast Fourier Transform (FFT) is an important algorithm used in the field of Digital Signal Processing and Communication Systems. The FFT has applications in a wide variety of areas, such as linear filtering, correlation, and spectrum analysis, among many others. This paper describes the development of decimation-in-time radix-2 FFT algorithm with 16 and 32 points. VHDL was used as a description language, and ISE Design Suite as an Integrated Development Environment (IDE).

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OpenAlex reports 18 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

The Fast Fourier Transform (FFT) is an important algorithm used in the field of Digital Signal Processing and Communication Systems. The FFT has applications in a wide variety of areas, such as linear filtering, correlation, and spectrum analysis, among many others. This paper describes the development of decimation-in-time radix-2 FFT algorithm with 16 and 32 points. VHDL was used as a description language, and ISE Design Suite as an Integrated Development Environment (IDE).

Key concepts: Fast Fourier transform, Computer science, VHDL, Decimation, Algorithm, Prime-factor FFT algorithm, Split-radix FFT algorithm, Field-programmable gate array

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