Design of a variable key length cryptographic processor

Secrecy has always played a central role. Not just military applications, even day-to-day civilian applications like Internet require data to be transmitted through a secure network. Most software based cryptographic systems are not only easier to design & upgrade but also portable and flexible; but it has an inherent inefficacy - the level of security is often not sufficient for a number of applications such as e-commerce, e-mail and e-banking. Hardware implementations are by nature physically more secure as they cannot be easily read or modified by an eavesdropper. Hardware also has another advantage: in the encryption process the data is correlated according to an algorithm which usually performs operation on the same data, this characteristic prevents computer techniques such as out of order execution to improve performance of the software execution which is executed one instruction at a time; meanwhile hardware implementations tend to be extremely parallel in nature and therefore will run many orders of magnitudes better than a software implementation. In this paper we propose a novel architecture for designing variable key length cryptographic processor based on Advanced Encryption Standard that will improve security. This novel architecture will provide a security that will increase as the cube of the present standard, which is most suited for the present industrial requirements.