2009•Unpublished venueRequires access

FPGA configuration on Xilinx ML506 Development Board Through the USB port in C/HDL

Sreedhar Kushal

Open publisher page 0 citations

Abstract

This paper gives a novel yet convenient technique of configuring a Virtex-5 FPGA device through the Universal Serial Bus(USB) port. The monotonous parallel port configuration using JTAG connectors is overcome by USB-port programming of the FPGA either in C or HDL (Hardware Description Language). A Xilinx Development platform (ML506 Evaluation platform is considered) consisting of the Field Programmable Gate Array (FPGA) populated with an SXT device is initially configured to henceforth being reconfigurable through the USB on reset/power up. The encrypted configuration bit stream arriving at the USB port is first accessed by the on- chip USB Controller operating preferably on a standalone mode. The data is then loaded on to the Type-I Compact Flash (CF) storage device (expandable to 8GB) through the System ACE controller. The System ACE MPU port is connected to the FPGA which allows the System ACE Controller to access the Compact Flash Card as a generic FAT File system. The FPGA is finally configured either in Serial/Select MAP modes through the dedicated pins. The reason why USB method is more beneficial is that it is more versatile, and doesn't require JTAG connectors which are scanty. Also, in areas where FPGA programming is done more frequently, USB method eliminates the process of disconnecting and reconnecting the subsequent FPGA boards, since the USB cable can be permanently connected with the respective FPGAs. It is faster to program FPGAs in bulk, also cheaper as the connectors are more costly than the USB cable.

About this research paper

What this paper is about

This paper gives a novel yet convenient technique of configuring a Virtex-5 FPGA device through the Universal Serial Bus(USB) port. The monotonous parallel port configuration using JTAG connectors is overcome by USB-port programming of the FPGA either in C or HDL (Hardware Description Language). A Xilinx Development platform (ML506 Evaluation platform is considered) consisting of the Field Programmable Gate Array (FPGA) populated with an SXT device is initially configured to henceforth being reconfigurable through the USB on reset/power up. The encrypted configuration bit stream arriving at the USB port is first accessed by the on- chip USB Controller operating preferably on a standalone mode. The data is then loaded on to the Type-I Compact Flash (CF) storage device (expandable to 8GB) through the System ACE controller. The System ACE MPU port is connected to the FPGA which allows the System ACE Controller to access the Compact Flash Card as a generic FAT File system. The FPGA is finally configured either in Serial/Select MAP modes through the dedicated pins. The reason why USB method is more beneficial is that it is more versatile, and doesn't require JTAG connectors which are scanty. Also, in areas where FPGA programming is done more frequently, USB method eliminates the process of disconnecting and reconnecting the subsequent FPGA boards, since the USB cable can be permanently connected with the respective FPGAs. It is faster to program FPGAs in bulk, also cheaper as the connectors are more costly than the USB cable.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

This paper gives a novel yet convenient technique of configuring a Virtex-5 FPGA device through the Universal Serial Bus(USB) port. The monotonous parallel port configuration using JTAG connectors is overcome by USB-port programming of the FPGA either in C or HDL (Hardware Description Language). A Xilinx Development platform (ML506 Evaluation platform is considered) consisting of the Field Programmable Gate Array (FPGA) populated with an SXT device is initially configured to henceforth being reconfigurable through the USB on reset/power up. The encrypted configuration bit stream arriving at the USB port is first accessed by the on- chip USB Controller operating preferably on a standalone mode. The data is then loaded on to the Type-I Compact Flash (CF) storage device (expandable to 8GB) through the System ACE controller. The System ACE MPU port is connected to the FPGA which allows the System ACE Controller to access the Compact Flash Card as a generic FAT File system. The FPGA is finally configured either in Serial/Select MAP modes through the dedicated pins. The reason why USB method is more beneficial is that it is more versatile, and doesn't require JTAG connectors which are scanty. Also, in areas where FPGA programming is done more frequently, USB method eliminates the process of disconnecting and reconnecting the subsequent FPGA boards, since the USB cable can be permanently connected with the respective FPGAs. It is faster to program FPGAs in bulk, also cheaper as the connectors are more costly than the USB cable.

Key concepts: USB, Field-programmable gate array, Embedded system, Computer hardware, Computer science, eXtensible Host Controller Interface (xHCI), Host controller interface, Controller (irrigation)

Related papers

Back to paper searchBrowse research topicsOriginal source
FPGA configuration on Xilinx ML506 Development Board Through the USB port in C/HDL — Research Paper | ScholarLens