Optimum Supply Voltage and Sleep Transistor Sizing for Energy Minimization in Latency-Constrained MTCMOS Circuits

There have been extensive studies of voltage scaling in subthreshold circuits in order to minimize energy consumption. However, power consumption in stand-by mode and MTCMOS circuits have been overlooked. In this paper, energy consumption of subthreshold MTCMOS circuit is analyzed. Power supply and sleep transistor size are optimized to minimize energy consumption when a latency constraint is given. Energy consumption due to dynamic switching and leakage is considered in standby mode as well as in active mode. Simulation results in 65nm CMOS process show the dependence of energy consumption on supply voltage, sleep transistor size and the latency constraint.