Scheduling Strategies for Non-Binary LDPC Codes

Non-binary LDPC codes are promising error cor- recting codes for short and moderate block lengths. These codes demonstrate interesting performances in high order fields, though are more complex to decode. As for binary LDPC codes, decoding scheduling can be optimized to improve performance. In this paper, a simulation-based approach is used for different scheduling policies in the non-binary case in order to point out possible performance gains for these codes. An optimization of decoding scheduling is also proposed and exhibits about 20% complexity reduction in error-floor region, thus promising interesting gains if combined with advanced dynamic scheduling strategies. I. INTRODUCTION Channel coding has seen important developments over the last two decades. Thanks to the introduction of advanced error- correcting codes, initiated by Turbo-codes in the early 90's, and to the use of iterative decoding techniques, Shannnon- limit performance has been closely approached. Low-Density Parity-Check (LDPC) codes, first introduced by Gallager (1) in the 60's, were rediscovered by Mackay and Neal (2) in 1996. Excellent error-correcting performance for long block lengths (3) position LDPC codes as an important candidate for advanced communication systems, already adopted in different standards, such as DVB-S2, IEEE 802.16 and 802.11n. How- ever, as codewords become shorter, LDPC performance gains are generally less satisfying. Non-binary LDPC codes, though more complex, proved to significantly improve performance for moderate and short blocklengths (4), (5). The use of a high order alphabet also suggests matching it with the modulation alphabet: LDPC codes over a 16�elements Galois field for example can be naturally mapped in 16�QAM modulated symbols. This would avoid the bit-to-symbol performance loss, especially when having a frequency selective channel, as non- binary encoding can reduce channel memory effect (6). This use of non-binary LDPC codes is thus very promising for high data rate communications, especially when complexity reduc- tion techniques are adopted, either for decoding update rules or scheduling policy. Previous work on scheduling strategies for the binary case can be found in (7). In this paper, we will first address a brief overview of decoding techniques for LDPC codes over high order extension fields. Then, scheduling strategies and effects will be compared for the non-binary case. A simulation-based approach will also be detailed to suggest new scheduling policies, and results from an optimized scheduling will be presented. The paper will be concluded by some remarks and suggestions towards future works.