DIGITAL LLRF FOR IFMIF-EVEDA

The IFMIF-EVEDA project aims to build a prototype accelerator (deuteron, 9MeV, 125mA) to be located at Rokkasho, Japan, for design validation of the IFMIF Accelerator. CIEMAT from Madrid, Spain, is in charge of providing the RF systems for this prototype accelerator. The LLRF will adjust the phase and amplitude of the RF drive and the resonance frequency of the cavities. This paper summarizes its main characteristics and Control System integrated in EPICS. The hardware is based on a commercial FPGA board, an analog front end and a local timing system. Each LLRF system will control and diagnose two RF chains and it will handle the RF fast Interlocks (vacuum, arcs, reflected power and multipacting). A specific LLRF will be developed for the special case of the RFQ cavity, with one Master LLRF and three Slave LLRFs to feed the 8 RF chains of the cavity. The conceptual design and other capabilities of the system like automatic conditioning, frequency tuning for startup and field flatness of the RFQ, etc, will be shown in this paper together with the first low power test results of the LLRF prototype and the performance of the Control System.