Fitting DFM in Your Design Flow

This paper surveys the DFM landscape across semiconductor industry. Beyond the DFM buzz, it explains what the industry is doing today and the new opportunities for 65 & 45 nm designs. However, in order to harness the new manufacturability improvement opportunities effectively, the paper describes the need for industry-wide collaboration that will allow flow of critical information between the four key stakeholders - Chip Designers (IDM and Fabless); Chip Manufacturers (Fabs, IDMs); EDA Vendors and Fab Equipment Suppliers. With increasing pressure for Time-To-Market, some design teams find it difficult to fit the new DFM methods into their design flow. Approaches are discussed that demonstrate DFM fitting very well into a chip design flow and infact improving Time-To-Market for the Deep Submicron Chips. 1. DFM & DFY - As old as Chip Design