Cache Coherence Protocols in Multi-Processor
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Abstract
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Abstract
Abstract—This paper describes the cache coherence protocols in multiprocessors. A cache coherence protocol ensures the data consistency of the system. Typical modern microprocessors are currently built with multicore architecture that will involve data transfers between from one cache to another. By applying cache coherence protocols to each of the caches, the coherency problem can be solved. With this resolution, simulations of the applied cache coherence protocols can be each presented to walk-through the coherency processes. This simulation is developed based on Verilog Coding and implemented using Xilinx Software. Using the same software, test benches was constructed to verify the functionality for each of the protocols. The cache coherence protocols consist of read operations and writes operations of the cache.
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Abstract—This paper describes the cache coherence protocols in multiprocessors. A cache coherence protocol ensures the data consistency of the system. Typical modern microprocessors are currently built with multicore architecture that will involve data transfers between from one cache to another. By applying cache coherence protocols to each of the caches, the coherency problem can be solved. With this resolution, simulations of the applied cache coherence protocols can be each presented to walk-through the coherency processes. This simulation is developed based on Verilog Coding and implemented using Xilinx Software. Using the same software, test benches was constructed to verify the functionality for each of the protocols. The cache coherence protocols consist of read operations and writes operations of the cache.
Key concepts: Computer science, Cache coherence, MESI protocol, MESIF protocol, Cache, Parallel computing, Computer architecture, Embedded system