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Wideband 70dB CMOS Digital Variable Gain Amplifier Design for DVB-T Receiver’s AGC

Chua‐Chin Wang, Ching‐Li Lee, Li-Ping Lin, Yih-Long Tseng

Open publisher page 26 citations

Abstract

This paper presents a novel VGA (variable gain amplifier) design which is applied in the AGC (automatic gain control) loop of DVB-T receivers. A total of three tunable gain stages are cascaded to provide a 70 dB dynamic range. Each gain stage is based on a DVGA (digital variable gain amplifier) which is composed of a plurality of GB (gain block) and a fully differential degeneration amplifier (FDDA). The GB are digitally controlled current mirrors which are used to determine the gain of the DVGA. A CMFB (common-mode feedback) circuitry is used to stabilize the FDDA. The bandwidth of the proposed design verified by HSPICE post-layout simulations is better than 95 MHz at every PVT corner which is sufficient for the DVB-T IF mixed-signal processing.

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What this paper is about

This paper presents a novel VGA (variable gain amplifier) design which is applied in the AGC (automatic gain control) loop of DVB-T receivers. A total of three tunable gain stages are cascaded to provide a 70 dB dynamic range. Each gain stage is based on a DVGA (digital variable gain amplifier) which is composed of a plurality of GB (gain block) and a fully differential degeneration amplifier (FDDA). The GB are digitally controlled current mirrors which are used to determine the gain of the DVGA. A CMFB (common-mode feedback) circuitry is used to stabilize the FDDA. The bandwidth of the proposed design verified by HSPICE post-layout simulations is better than 95 MHz at every PVT corner which is sufficient for the DVB-T IF mixed-signal processing.

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Available abstract

This paper presents a novel VGA (variable gain amplifier) design which is applied in the AGC (automatic gain control) loop of DVB-T receivers. A total of three tunable gain stages are cascaded to provide a 70 dB dynamic range. Each gain stage is based on a DVGA (digital variable gain amplifier) which is composed of a plurality of GB (gain block) and a fully differential degeneration amplifier (FDDA). The GB are digitally controlled current mirrors which are used to determine the gain of the DVGA. A CMFB (common-mode feedback) circuitry is used to stabilize the FDDA. The bandwidth of the proposed design verified by HSPICE post-layout simulations is better than 95 MHz at every PVT corner which is sufficient for the DVB-T IF mixed-signal processing.

Key concepts: Variable-gain amplifier, Automatic gain control, Open-loop gain, Fully differential amplifier, Phase margin, Electronic engineering, Wideband, Loop gain

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