Multi-dimensional routing algorithms for congestion minimization in Network-on-Chip

In network on chip (NoC), the traditional routing schemes are routing the network through a single path or multiple paths from one source node to a destination node, which will minimize the congestion in the routing architecture. Though these routing algorithms are moderately efficient, but time dependent. To reduce overall data packet transmission time in the network, we consider a network with multiple sources and multiple destinations. Multi-dimensional routing problems appear naturally in several resource allocation problems, communication networks and wireless sensor networks. In this paper, we have shown a multi-dimensional path routing algorithm for minimizing the congestion in NoC with deadlock free.