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2008•Unpublished venueRequires access

A compact DSP architecture for digital audio

Changwon Ryu, Hyung-Bae Park, Jusung Park, Kangjoo Kim

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Abstract

This paper describes the architecture and design procedure of a DSP (Digital Signal Processor) for the digital audio applications. The suggested DSP has fixed 24bit data structure, 6 stage pipeline, and 125 instructions. Some of the instructions are specially designed for the audio signal processing. The designed DSP has been verified by comparing the results from CBS (Cycle based Simulator) and those of HDL simulation through the single instruction set test, the instruction combination test, and real audio applications. Finally, we confirm by the HDL simulation that the DSP carried out successfully out ADPCM and MPEG-2 AAC decoding algorithm.

About this research paper

What this paper is about

This paper describes the architecture and design procedure of a DSP (Digital Signal Processor) for the digital audio applications. The suggested DSP has fixed 24bit data structure, 6 stage pipeline, and 125 instructions. Some of the instructions are specially designed for the audio signal processing. The designed DSP has been verified by comparing the results from CBS (Cycle based Simulator) and those of HDL simulation through the single instruction set test, the instruction combination test, and real audio applications. Finally, we confirm by the HDL simulation that the DSP carried out successfully out ADPCM and MPEG-2 AAC decoding algorithm.

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OpenAlex reports 1 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

This paper describes the architecture and design procedure of a DSP (Digital Signal Processor) for the digital audio applications. The suggested DSP has fixed 24bit data structure, 6 stage pipeline, and 125 instructions. Some of the instructions are specially designed for the audio signal processing. The designed DSP has been verified by comparing the results from CBS (Cycle based Simulator) and those of HDL simulation through the single instruction set test, the instruction combination test, and real audio applications. Finally, we confirm by the HDL simulation that the DSP carried out successfully out ADPCM and MPEG-2 AAC decoding algorithm.

Key concepts: Digital signal processing, Computer science, Pipeline (software), Audio signal processing, Digital audio, Instruction set, Digital signal processor, Computer hardware

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