2002Unpublished venueRequires access

Testability features of AMD-K6/sup TM/ microprocessor

R.S. Fetherston, Izaz Shaik, Shaohua Ma

Open publisher page 22 citations

Abstract

This paper describes the testability features and test pattern development methodologies for the AMD-K6/sup TM/ microprocessor. The embedded design for testability (DFT) structures and test strategy provide high quality manufacturing tests.

About this research paper

What this paper is about

This paper describes the testability features and test pattern development methodologies for the AMD-K6/sup TM/ microprocessor. The embedded design for testability (DFT) structures and test strategy provide high quality manufacturing tests.

Why it matters

OpenAlex reports 22 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

This paper describes the testability features and test pattern development methodologies for the AMD-K6/sup TM/ microprocessor. The embedded design for testability (DFT) structures and test strategy provide high quality manufacturing tests.

Key concepts: Testability, Design for testing, Microprocessor, Computer science, Embedded system, Reliability engineering, Computer architecture, Engineering

Related papers

Back to paper searchBrowse research topicsOriginal source
Testability features of AMD-K6/sup TM/ microprocessor — Research Paper | ScholarLens