Exceeding the Dataflow Limit via Value Prediction
Mikko H. Lipasti, John Paul Shen
Abstract
Mikko H. Lipasti, John Paul Shen
Abstract
For decades, the serialization constraints imposed by true data dependences have been regarded as an absolute limit--the dutuflow limit--on the parallel execution of serial programs. This paperproposes a new technique--value prediction--for exceeding that limit that allows data dependent instructions to issue and execute in parallel without violating program semantics. This technique is built on the concept of value locality, which descn’bes the likelihood of the recurrence of a previously-seen value within a storage location inside u computer system. Value prediction consists of predicting entire 32- and 64-bit register values based on previously-seen values. We find that such register values being written by machine instructions are frequently predictable. Furthermore, we show that simple microarchitectural enhancements to a modem microprocessor implementation based on the PowerPC 620 that enable value prediction can effectively exploit value locality to collapse true dependences, reduce average result latency, and provide performance gains of 4.5%-23 % (depending on machine model) by exceeding the dataflow limit. 1. Motivation and Related
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For decades, the serialization constraints imposed by true data dependences have been regarded as an absolute limit--the dutuflow limit--on the parallel execution of serial programs. This paperproposes a new technique--value prediction--for exceeding that limit that allows data dependent instructions to issue and execute in parallel without violating program semantics. This technique is built on the concept of value locality, which descn’bes the likelihood of the recurrence of a previously-seen value within a storage location inside u computer system. Value prediction consists of predicting entire 32- and 64-bit register values based on previously-seen values. We find that such register values being written by machine instructions are frequently predictable. Furthermore, we show that simple microarchitectural enhancements to a modem microprocessor implementation based on the PowerPC 620 that enable value prediction can effectively exploit value locality to collapse true dependences, reduce average result latency, and provide performance gains of 4.5%-23 % (depending on machine model) by exceeding the dataflow limit. 1. Motivation and Related
Key concepts: Dataflow, PowerPC, Computer science, Serialization, Locality, Limit (mathematics), Parallel computing, Latency (audio)