New improved 1-bit full adder cells
Sreehari Veeramachaneni, M.B. Srinivas
Abstract
Sreehari Veeramachaneni, M.B. Srinivas
Abstract
The 1-bit full adder is a very important component in the design of application specific integrated circuits. In this paper, authors propose three new 1-bit full adders having a delay of 2-transistor (2T) using existing XOR and XNOR gates. The power consumption, delay and area of these new full adders are compared with existing ones and the results appear to be promising. The combination of low power, low transistor count and lesser delay makes the new full adders a viable option for efficient design.
OpenAlex reports 38 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
The 1-bit full adder is a very important component in the design of application specific integrated circuits. In this paper, authors propose three new 1-bit full adders having a delay of 2-transistor (2T) using existing XOR and XNOR gates. The power consumption, delay and area of these new full adders are compared with existing ones and the results appear to be promising. The combination of low power, low transistor count and lesser delay makes the new full adders a viable option for efficient design.
Key concepts: Adder, XNOR gate, Serial binary adder, Transistor count, Computer science, Carry-save adder, Logic gate, Transistor