Metal FEAs on double layer structure of polycrystalline silicon
Il Hwan Kim, Chun Gyoo Lee, Byung Gook Park, Jong Duk Lee, Joha Hyun Won
Abstract
Il Hwan Kim, Chun Gyoo Lee, Byung Gook Park, Jong Duk Lee, Joha Hyun Won
Abstract
Metal field emitter arrays were fabricated on a single polysilicon layer and on a double polysilicon layer. From the observation of metal field emitters fabricated on the single polysilicon layer, it was noticed that the irregular shape of the gate hole was caused by the large grain of polysilicon. To suppress the grain growth of doped polysilicon during oxidation, an undoped polysilicon layer was used to form a gate insulator and a doped polysilicon layer was used to serve as a conducting layer. Due to the small grain size of undoped polysilicon, the shape of gate aperture was improved to be as symmetric as in single crystal silicon.
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Metal field emitter arrays were fabricated on a single polysilicon layer and on a double polysilicon layer. From the observation of metal field emitters fabricated on the single polysilicon layer, it was noticed that the irregular shape of the gate hole was caused by the large grain of polysilicon. To suppress the grain growth of doped polysilicon during oxidation, an undoped polysilicon layer was used to form a gate insulator and a doped polysilicon layer was used to serve as a conducting layer. Due to the small grain size of undoped polysilicon, the shape of gate aperture was improved to be as symmetric as in single crystal silicon.
Key concepts: Polysilicon depletion effect, Materials science, Polycrystalline silicon, Silicon, Common emitter, Layer (electronics), Optoelectronics, Doping