Implementing the results of a manufacturing simulation in a semiconductor line

Semiconductor manufacturing is an extremely complex process. The requirements for ultraclean environments and intricate production capabilities result in capital intensive facilities and equipment. Wafer fabrication involves hundreds of individual tools performing multiple processes to produce an array of sophisticated end products. Worldwide competitive realities produce ongoing pressures to reduce the time and cost of both development and manufacturing activities. Simulation provides a practical and powerful method for analyzing and optimizing such a complex environment.This paper presents an overview of a modeling and simulation effort designed to quantify turnaround time improvement opportunities in a leading-edge semiconductor development line. Product turnaround time is a key determinant of success in semiconductor manufacturing due to its contribution in critical areas including contamination, yield-learning, and process control.The focus of the simulation project was the analysis of line loading levels and their impact on turnaround time. The results of the project led to policy changes and significantly improved turnaround time performance. The paper presents an overview of the line modeled, a discussion of the line characteristics incorporated in the model, and the simulation results. The changes implemented in the line are discussed, and the resultant improvements described.