An FPGA Implementation of the Natural Logarithm Based on CORDIC Algorithm

In digital signal and image processing, it’s very common to calculate the value of certain transcendental functions, such as natural logarithmic function. This study introduces the basic principles of the mode of calculation of the hyperbolic systems by using the CORDIC algorithm, then analyses the Field-Programmable Gate Array (FPGA) CORDIC core processing unit in detail. The biggest advantage of the CORDIC algorithm is that its circuit structure is very simple, using only adder and shifter. It is very suitable for FPGA implementation. Based on the iterative algorithm, a FPGA implementation of the natural logarithmic function has been designed. The pipelined- FPGA architecture can achieve a high computational speed, for completing a computation only requires one clock cycle. The relative error values are below 10-4, which can satisfy the accuracy requirements.