1991IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsRequires access

SKOL: a system for logic synthesis and technology mapping

Reinaldo A. Bergamaschi

Open publisher page 3 citations

Abstract

SKOL, a system for combinational logic synthesis using library of cells, with emphasis on technology mapping algorithms, is described. It combines current multilevel optimization techniques with a new approach to the technology mapping problem. This approach uses a numerical string for representing the Boolean expressions and the library cells, which allows a fast selection process. Technology mapping is performed directly on the factored Boolean network, without decomposing it into primitive gates. A dynamic programming approach is used for mapping the whole Boolean network based on the possible matches for each node. Results from benchmark examples show that this approach is effective in reducing the final cell count. Comparisons with existing systems are presented.>

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SKOL, a system for combinational logic synthesis using library of cells, with emphasis on technology mapping algorithms, is described. It combines current multilevel optimization techniques with a new approach to the technology mapping problem. This approach uses a numerical string for representing the Boolean expressions and the library cells, which allows a fast selection process. Technology mapping is performed directly on the factored Boolean network, without decomposing it into primitive gates. A dynamic programming approach is used for mapping the whole Boolean network based on the possible matches for each node. Results from benchmark examples show that this approach is effective in reducing the final cell count. Comparisons with existing systems are presented.>

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Available abstract

SKOL, a system for combinational logic synthesis using library of cells, with emphasis on technology mapping algorithms, is described. It combines current multilevel optimization techniques with a new approach to the technology mapping problem. This approach uses a numerical string for representing the Boolean expressions and the library cells, which allows a fast selection process. Technology mapping is performed directly on the factored Boolean network, without decomposing it into primitive gates. A dynamic programming approach is used for mapping the whole Boolean network based on the possible matches for each node. Results from benchmark examples show that this approach is effective in reducing the final cell count. Comparisons with existing systems are presented.>

Key concepts: Computer science, Benchmark (surveying), String (physics), Circuit minimization for Boolean functions, Boolean network, Process (computing), Theoretical computer science, And-inverter graph

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