2002•Unpublished venueRequires access

Jitter measurements of a PowerPC/sup TM/ microprocessor using an analytic signal method

Takahiro J. YAMAGUCHI, Mani Soma, D. Halter, Jene Nissen, Rajesh Raina, M. Ishida, T. Watanabe

Open publisher page 23 citations

Abstract

This paper demonstrates a new method for measuring both peak-to-peak and RMS jitter in PLL output signals. The theoretical basis for this method is derived from analytic signal theory. To validate the method, experimental data from PowerPC/sup TM/ microprocessor jitter measurements is compared with results obtained with the conventional time interval analyzer (TIA) technique.

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What this paper is about

This paper demonstrates a new method for measuring both peak-to-peak and RMS jitter in PLL output signals. The theoretical basis for this method is derived from analytic signal theory. To validate the method, experimental data from PowerPC/sup TM/ microprocessor jitter measurements is compared with results obtained with the conventional time interval analyzer (TIA) technique.

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OpenAlex reports 23 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

This paper demonstrates a new method for measuring both peak-to-peak and RMS jitter in PLL output signals. The theoretical basis for this method is derived from analytic signal theory. To validate the method, experimental data from PowerPC/sup TM/ microprocessor jitter measurements is compared with results obtained with the conventional time interval analyzer (TIA) technique.

Key concepts: PowerPC, Jitter, Microprocessor, SIGNAL (programming language), Computer science, Electronic engineering, Computer hardware, Engineering

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