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2011•Journal of Circuits Systems and ComputersOpen access

HIGH-SLEW RATE LOW-QUIESCENT CURRENT RAIL-TO-RAIL CMOS BUFFER AMPLIFIER FOR FLAT PANEL DISPLAYS

Merih Yıldız, Shahram Mınaeı, Emre Arslan

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Abstract

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.

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What this paper is about

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.

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Available abstract

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.

Key concepts: Slew rate, Operational transconductance amplifier, Buffer amplifier, Phase margin, Amplifier, Current-feedback operational amplifier, Electrical engineering, Transconductance

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HIGH-SLEW RATE LOW-QUIESCENT CURRENT RAIL-TO-RAIL CMOS BUFFER AMPLIFIER FOR FLAT PANEL DISPLAYS — Research Paper | ScholarLens