Modeling interprocessor communication in polymorphic processor arrays
Pierpaolo Baglietto, Massimo Maresca, A. L. Frisiani
Abstract
Pierpaolo Baglietto, Massimo Maresca, A. L. Frisiani
Abstract
A high-level model for interprocessor communication operations in polymorphic processor arrays (PPA) is presented. The interconnection network topology and the connection autonomy features of an SIMD massively parallel computer have great influence on its computational capabilities. The model is expressed in terms of procedures available in a function library of the PPC (polymorphic parallel C) language, which was developed for SIMD massively parallel programming. The PPA architecture, the PPC language, the interprocessor communication model, and an example of its use are presented.>
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A high-level model for interprocessor communication operations in polymorphic processor arrays (PPA) is presented. The interconnection network topology and the connection autonomy features of an SIMD massively parallel computer have great influence on its computational capabilities. The model is expressed in terms of procedures available in a function library of the PPC (polymorphic parallel C) language, which was developed for SIMD massively parallel programming. The PPA architecture, the PPC language, the interprocessor communication model, and an example of its use are presented.>
Key concepts: Massively parallel, SIMD, Computer science, Parallel computing, Interconnection, Computer architecture, Telecommunications