2011International Journal of Electrical and Computer Engineering (IJECE)Open access

A 93.36 dB, 161 MHz CMOS Operational Transconductance Amplifier (OTA) for a 16 Bit Pipeline Analog-to-Digital Converter (ADC)

Nordiana Mukahar, Siti Hawa Ruslan

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Abstract

A gain modified CMOS Operational Transconductance Amplifier (OTA) for a 16 bit pipeline Analog-to-Digital Converter (ADC) is presented. The circuit is designed to be used for a high resolution and low sampling rate ADC. Gain boosting technique is implemented in the design to achieve high DC gain and settling time as required. Post layout simulations for a 5 pF load capacitance shows that OTA achieves a gain bandwidth of 161 MHz at a phase margin 93.14 o with 93.27 dB DC gain. The settling time for an OTA is 163 ns for 0.1 % accuracy to achieve final value and consume power about 4.88 mW from 5 V power supply. Keywords : ADC; common mode feedback; CMOS Operational Amplifier; fully differential folded cascade DOI: http://dx.doi.org/10.11591/ijece.v2i1.121

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A gain modified CMOS Operational Transconductance Amplifier (OTA) for a 16 bit pipeline Analog-to-Digital Converter (ADC) is presented. The circuit is designed to be used for a high resolution and low sampling rate ADC. Gain boosting technique is implemented in the design to achieve high DC gain and settling time as required. Post layout simulations for a 5 pF load capacitance shows that OTA achieves a gain bandwidth of 161 MHz at a phase margin 93.14 o with 93.27 dB DC gain. The settling time for an OTA is 163 ns for 0.1 % accuracy to achieve final value and consume power about 4.88 mW from 5 V power supply. Keywords : ADC; common mode feedback; CMOS Operational Amplifier; fully differential folded cascade DOI: http://dx.doi.org/10.11591/ijece.v2i1.121

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Available abstract

A gain modified CMOS Operational Transconductance Amplifier (OTA) for a 16 bit pipeline Analog-to-Digital Converter (ADC) is presented. The circuit is designed to be used for a high resolution and low sampling rate ADC. Gain boosting technique is implemented in the design to achieve high DC gain and settling time as required. Post layout simulations for a 5 pF load capacitance shows that OTA achieves a gain bandwidth of 161 MHz at a phase margin 93.14 o with 93.27 dB DC gain. The settling time for an OTA is 163 ns for 0.1 % accuracy to achieve final value and consume power about 4.88 mW from 5 V power supply. Keywords : ADC; common mode feedback; CMOS Operational Amplifier; fully differential folded cascade DOI: http://dx.doi.org/10.11591/ijece.v2i1.121

Key concepts: Operational transconductance amplifier, Operational amplifier, Pipeline (software), CMOS, Bit (key), 12-bit, Analog-to-digital converter, Computer science

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A 93.36 dB, 161 MHz CMOS Operational Transconductance Amplifier (OTA) for a 16 Bit Pipeline Analog-to-Digital Converter (ADC) — Research Paper | ScholarLens